.pl 10.75i
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.nr PS 12
.nr VS 15
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.LG
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DESIGN SIMULATION SYSTEMS LTD
.sp 10
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GSP
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(Graphics to Spice)
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Lightning Compiler
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Release 2.0 Final
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User Manual & Description
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.sp 15
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Mark Sitkowski
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OVERVIEW
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GSP is a tool which generates a Berkeley SPICE netlist from a SCALD
format drawing.
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GSP reduces the time taken between a drawing modification and a
resumption of a simulation from the industry average of 1 minute
for a medium size design (100 nodes) to approximately 200 milliseconds
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It requires no command files or knowledge of the Unix operating
system or of its associated text editors. However, it has the
capability of accepting a command file for paths to libraries,
if these are located somewhere other than under a common root.
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GSP has an inherent understanding of SPICE2G6 and Spice3D2 primitives,
thus making unnecessary the duplication of body drawings and spice models
for generic parts totally described by one primitive. It means that
libraries of resistors, capacitors, transistors, diodes etc, need
only contain physical data files for use by PCB layout tools etc, the part
being defined on the schematic by a common body from the existing
spice library, and by body properties.
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It works directly from the files created by GEX, and produces a
netlist, compatible with either SPICE or Precise, depending on the
method of invocation. A cross-reference file ("spice.xref") is also produced,
under the drawing directory, which contains SPICE node numbers and their
corresponding signal-names as defined within GEX.
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Hierarchical designs are handled by flattening the hierarchy to a
single netlist, without the use of the .SUBCKT construction (originally
introduced by Berkeley to save typing), thus ensuring maximum speed of
execution of the SPICE simulator.
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At present, hierarchical expansion has been artificially limited to two levels,
since it was found that most analogue designs comprise the top level
(containing bodies) and one sub-level (containing the SPICE primitives
within those bodies). This limitation maximises the compilation speed.
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GSP offers certain enhancements currently unavailable on most netlisters,
as follows:
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a) Interpretation of polynomial expressions for SPICE2G6
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GSP correctly interprets polynomial expressions describing the transfer
functions of non-linear dependent sources and thus permits high-level
modelling of such functions as A to D and D to A converters, log and
power-law amplifiers, modulators etc.
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b) Interpretation of transfer function equations for Spice3D2
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GSP correctly interprets mathematical equations describing the transfer
functions of non-linear dependent sources and thus permits high-level
modelling of such functions as A to D and D to A converters, log and
power-law amplifiers, modulators etc.
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c) Compilation of multi-winding transformers
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Inductors may be coupled on the schematic, without the need for special
bodies, in any number and any order.
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d) Automatic inclusion of semiconductor model parameters
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A search is performed in all libraries through the 'models' files and all
necessary model parameters are included at the head of the netlist.
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e) Spice3D2 advanced primitives
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In addition to all the standard SPICE2G6 primitives, the advanced
primitives of Spice3D2 are included, such as switches, GaAs FET's etc.
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OPERATION
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Invocation
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GSP is invoked as follows:
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GSP
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GSP will generate a netlist in file called 'name.ckt' and a cross-reference
of node numbers and GEX node names in a file 'name/spice.xref'.
A dummy ".tran" command, together with a dummy ".print" statement are inserted
after the title. The assumption is that the correct simulator commands and
print/plot statements will be inserted from Vspice3.
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The file "name" must be a standard GEX drawing having either a spice_cn.1.1
or logic_cn.1.1 connectivity file.
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GSP will default to a search of the current directory, and under the root
adt/lib for all libraries described in the above connectivity file. It also
expects to find a file named 'models' directly under each library, or in the
current directory, containing semiconductor model definitions, as described
below under 'Models'.
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GSP
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As above, but the search path will now assume that libraries also exist
under the root given in the second argument.
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GSP -f
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If libaries are widely scattered around the file systems, or around ethernet,
the paths to them may be included in a file, one per line, containing no other
information. An example of a complete file is as follows:
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/usr4/lib
/net/machname/usr2/lib/analog
/usr6/natsemi/linear/opamps
adt/lib/signetics/linear/opamps
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GSP -s
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If the first argument is -s, GSP assumes that a SPICE netlist is required,
and generates the file 'name.netlist' instead of 'name.ckt' and the cross-
reference file 'name/spice.xref'.
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If Vspice3 is not going to be used, and a file 'name.header' exists, its
contents will be inserted at the head of the netlist. The file should contain
the SPICE analysis cards for simulating the netlist, together with print/plot
directives. All .PLOT and .PRINT commands should in the format:
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.PLOT DC/AC/TRAN/etc V(%NET_NAME1) V(%NET_NAME2).....
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where NET_NAME1, NET_NAME2 etc are GEX net names.
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GSP will substitute SPICE node numbers from 'name/spice.xref' for the net names.
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The -s should be followed by any of the formats used for Precise typed in
exactly the same way, e.g:
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.IP
\'GSP -s videoamp -f path.cmd'
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COMPILATION RULES
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GSP observes the following procedures when compiling:
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PRIMITIVE DEVICES
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If a component has any of the following names, it is assumed to be
a SPICE primitive, whose characteristics are known to GSP, and no library
search is performed:
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Valid-compatible components:
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Resistor: 'resistor'
Capacitor: 'capacitor'
Inductor: 'inductor'
Transmission Line: 'transmission'
Voltage source: 'vsource'
Current source: 'isource'
Voltage-controlled voltage source: 'vsourcev'
Voltage-controlled current source: 'isourcev'
Current-controlled voltage source: 'vsourcei'
Current-controlled current source: 'isourcei'
Ground symbol: 'ground' 'gnd'
Bipolar transistor: 'npn' 'pnp'
Mosfet: 'pmos' 'nmos'
Jfet: 'njfet' 'pjfet'
Diode: 'diode'
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Non-Valid compatible components:
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Resistor: 'res' 'r'
Capacitor: 'cap' 'c'
Inductor: 'l'
Transmission Line: 'txline'
Voltage source: 'vsource' 'vsrc'
Current source: 'isource' 'isrc'
Voltage-controlled voltage source: 'vsrcv'
Voltage-controlled current source: 'isrcv'
Current-controlled voltage source: 'vsrci'
Current-controlled current source: 'isrci'
Bipolar transistor: 'tnpn' 'tpnp'
Mosfet: 'pmf' 'nmf'
Jfet: 'pfet' 'nfet'
Diode: 'd'
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Spice3D2 additional components:
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GaAs FET: 'nmf' 'pmf'
Voltage-controlled switch: 'vswitch' 'vsw'
Current-controlled switch: 'iswitch' 'isw'
Distributed (Lossy) RC Line: 'rcline'
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The absence of a 'VALUE' property on a resistor, capacitor, or inductor,
the absence of a 'VALUE' or 'PARAMS' property on a voltage or current source,
or the absence of a 'MODEL' property on a semiconductor device, switch or
rc line is considered a fatal error, and GSP flags this and aborts.
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SEMICONDUCTOR DEVICES
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All semiconductor devices must have the property 'MODEL=XYZ', where 'XYZ'
is a device name, as it appears in the 'models' file. If a component is
hierarchical (e.g power device, where the spice.1.1 drawing contains
lead inductances etc) then the 'MODEL' property should be on the primitive
in the spice.1.1 drawing, NOT on the top level body. The additional placing
of a 'MODEL' property on the body will cause two identical .MODEL entries to
be placed in the output file.
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If any component has a 'MODEL' property, it is assumed to be a semiconductor
device, switch or rcline. If there is no spice or logic_cn.1.1, or no
corresponding entry in the 'models' file, this is reported as a warning,
but GSP completes the netlist.
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MODELS
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GSP is compatible with all SPICE macro models generated in GEX, whether
hierarchical or not, with the proviso that there are only two levels of
hierarchy.
The top level may be a logic.1.1 or a spice.1.1 drawing, containing bodies,
each of which has a no more than one spice.1.1 or logic.1.1 drawing beneath it.
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A single-level drawing may be either a logic.1.1 or a spice.1.1 drawing,
provided that it contains only the primitives named above.
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All semiconductor, switch and rc line SPICE model descriptions should be
in a file called 'models', situated either in the user's local directory,
or directly under the corresponding library subdirectory. The file should
contain semiconductor .MODEL cards, one per line, with each continuation
line starting with a '+' as in the following example:
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.MODEL BC108 NPN BF=120 IKF=30E-3 ISC=1E-8
+TF=1.5N TR=6N RB=100 VAF=30 CJE=10PF VJE=0.6 CJC=2PF
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Model files may also be in the local directory, which is searched by default,
or adt/lib may contain a master model file.
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The search always follows the same order (i.e adt/lib, local directory, user-defined
search paths) so if speed is critical, some advantage may be gained by putting a
hard or soft link from adt/lib to a master file located in a convenient directory.
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MULTI-WINDING TRANSFORMERS
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A transformer is constructed in GEX in the following manner:
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1) All windings are inductors, whose inductance is specified by the
property 'VALUE=n'.
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2) All windings of a transformer must have the property 'LOCATION=Lx',
where Lx is a name unique to that transformer, and 'x' is not a digit.
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3) One winding, conveniently the primary, must have the property 'COUPLED=Lp Lq Lr Ls'
and also the property 'PARAMS=a b c d e f g h i j'.
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Lp Lq Lr and Ls are the location properties of the secondary windings,
specified as above, and separated by spaces. The 'PARAMS' property specifies
the coupling coefficients, again separated by spaces, each expressed as a number
less than unity, (optionally floating point) of all windings with respect to one
another according to the following rule, for a five-winding transformer:
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Lx to Lp = a
Lx to Lq = b
Lx to Lr = c
Lx to Ls = d
Lp to Lq = e
Lp to Lr = f
Lp to Ls = g
Lq to Lr = h
Lq to Ls = i
Lr to Ls = j
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GSP will translate all inductor location properties to a linearly-numbered set
of SPICE device names, and produce coupling statements in the output file of the
following form:
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K1 L1 L2 a
K2 L1 L3 b
K3 L1 L4 c
K4 L1 L5 d
K5 L2 L3 e
K6 L2 L4 f
K7 L2 L5 g
K8 L3 L4 h
K9 L3 L5 i
K10 L4 L5 j
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Note that there must be the correct number of coefficients, otherwise no entry
will be made in the output file, and that no coupling coefficient may have a
value greater than unity.
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SOURCES WITH EQUATION-DEFINED TRANSFER FUNCTIONS (Spice3 only)
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Non-linear dependent sources, both current and voltage controlled, are
constructed from the SPICE primitives 'vsource' and 'isource', 'vsrc'
and 'isrc', or any compatible name. They are defined in GEX in the following
manner:
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1) Each output source must have a property 'LOCATION=x' where 'x' is a name,
whose first character MUST be 'B'.
Spice3 makes no distinction as to whether the source is voltage or current
controlled, the equation being the key.
The equation must contain a combination of symbolic voltage source names or
net names and the following mathematical operators:
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+ - * / ^
abs acos acosh asin asinh
atan atanh cos cosh exp
ln log sin sinh sqrt
tan
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GSP does not parse the equation, since the simulator will do this at
run time, but merely substitutes node numbers for symbolic node names,
and voltage source names for their symbolic equivalent. For example,
if it is desired to make a current a function of the 12th power of the
difference of two voltages, a current source would be added in GEX, and
given a location property of, perhaps, 'BDIFF'. It would then be given a
PARAMS property of:
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'(v(vplus) - v(vminus))^12'
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where 'vplus' and 'vminus' are net names assigned with NAME NET.
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In the netlist, this might appear as:
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B1 1 0 I=(V(3) - V(4))^12
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In a case where a voltage is required to be, say, a function of the product
of two currents, a voltage source would be given the location property 'BMULT',
and the PARAMS property:
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'I(VCURRENT1) * I(VCURRENT2)'
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This might appear in the netlist as:
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B2 2 0 V=I(V3) * I(V9)
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Note that net names MUST begin with a character, not a digit, since GSP
assumes that numeric entries in the equation are node numbers, supplied by
the user, and does nothing to them.
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SOURCES WITH POLYNOMIAL-DEFINED TRANSFER FUNCTIONS (Spice2 only)
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Non-linear dependent sources, both current and voltage controlled, are
constructed from the SPICE primitives 'vsource' and 'isource', 'vsrc'
and 'isrc', or any compatible name. They are defined in GEX in the following
manner:
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1) Each output source must have a property 'LOCATION=x' where 'x' is a name,
whose first character determines the type of source, acccording to the
following table:
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E = Voltage-controlled voltage source
G = Voltage-controlled current source
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F = Current-controlled current source
H = Current-controlled voltage source
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No check is performed for this latter, since it is not possible to predict
the type of source required, and if the polynomial is incompatible, no
name substitution is performed.
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2) Voltage-controlled sources are associated with the netnames of the wires
corresponding to the controlling voltage(s), so these wires should be given
net names of no more than eight characters.
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3) Current-controlled sources are associated with current-measuring voltage-
sources, each of which has the VALUE property '0' or 'DC 0', and passes
the controlling current. Each current-measuring voltage source must have the
property 'LOCATION=Vn', which must be identical with that used in the
polynomial definition. Again, if the names do not correspond, no substitution
is performed.
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4) Each voltage-controlled output source must have a polynomial definition,
defined by the property 'PARAMS=POLY(n) s1 s0 t1 t0 u1 u0...z1 z0 p1 p2...pn'.
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The factor 'n' states the number of voltages (net name pairs) of which the
output is a function, and s1 s0 ... z1 z0 are pairs of net names defining the
controlling voltage(s). The net names s1, t1 etc are the positive nodes, and
s0, t0 etc are the negative nodes. If any voltage is referred to ground, the
net name corresponding to the ground node is specified as '0'. If 'n' is
incorrect, no substitution is performed.
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The factors p1 ... pn are the coefficients of the polynomial defining the
transfer function, as outlined in the SPICE 2G.6 manual.
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5) Each current-controlled output source must have a polynomial definition,
defined by the property 'PARAMS=POLY(n) V1 V2 V3 ...Vn p1 p2...pn'
where V1 ... Vn are the location properties of the current-measuring zero-
valued voltage sources.
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The factor 'n' states the number of currents (zero-valued voltage sources) of
which the output is a function.
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The factors p1 ... pn are the coefficients of the polynomial defining the
transfer function, as outlined in the SPICE 2G.6 manual.
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OUTPUT FILES
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The output files generated are 'name.ckt' and 'name/spice.xref', where 'name'
is the drawing name.
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The .ckt file is a standard Berkeley netlist, but contains a dummy
simulation command (".tran") and a dummy print command (".print"). These
are replaced by the correct commands from the SETUP menu in Vspice3, and
the file is then renamed, 'name.netlist'.
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The xref file has two sections, both of which is a two column list. The
first is a list of symbolic names assigned in GEX, and the corresponding
numbers which appear in the SPICE netlist. The second is a list of all the
components of the drawing, and their corresponding PATH properties. The file
is used by vspice3 to relate mouse-selected items on the drawing to the
netlist.
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RUNTIME
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The typical runtime, for a design of 50 to 100 nodes, is approximately
100 milliseconds, on a Sun Sparc2. This is the time taken to perform terminal
I/O in printing the message to the screen, and the time taken to access the
disk.
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BUGS and OMISSIONS
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1. Cross-reference only includes top level net names
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Although GSP has at its disposal a full cross-reference of all signal names
in the design, these are not included because each body contains local names
which, if multiple instances of the body exist, will be duplicated.
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Different applications read the cross-reference file for different reasons,
and the method of inclusion of these extra signal names would need to consider
the application.
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3. Multiple page designs are not compiled
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This is being considered.
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4. Subcircuit definitions are not read in.
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This may be implemented, using the Mentor Graphics nomenclature for the pin
names of the subcircuit. A body needs to be created with pins named N1, N2.. Nn,
which will be related in numerical order to the subcircuit's pin numbers.
GSP will then assign circuit node numbers to the body in this order.
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